Electrically erasable programmable read-only memory (EFPROM) is a memory chip that does not lose data after power-down. In practical applications, when writing data into the EFPROM, the length of page data register limits the length of data to be written each time. Therefore, if the length of the data to be stored exceeds the length of the page data register, in other words, if the length of the data to be stored is more than one page, multiple write operations are needed to complete the storage of all the data.
During each write operation, an erase operation is usually first performed on a target memory area, and then a programming operation is performed on the erased target memory area, thus the page data writing is completed. Specifically, as shown in FIG. 1, when erasing the target memory area, the data state in the target memory area is first changed from an active state to an indefinite state, and then from the indefinite state to an erased state, thus the erase operation is completed. When programming the target memory area, the data state in the target memory area is first changed from the erased state to the indefinite state, and then from the indefinite state to the active state, thus the programming operation is completed. After updating the target memory area, a new address is used as the target memory area, and the above-described operations are repeated to update the data in another target memory area.
However, during the data writing process, if the write operation is interrupted while the data state in the target memory area is in the indefinite state or the erased state, it can cause the occurrence of data loss. To avoid the occurrence of the data loss, currently a backup storage method is usually used to store the data. In other words, the same data to be written can be sequentially written into the target memory area and the backup memory area respectively, and at least one data state in the target memory area and the backup memory area is in the active state at any time. For the same data to be written, the erase and programming operations are first performed on the target memory area, and then the erase and programming operations are performed on the backup memory area, to ensure at least one data state in the target memory area and the backup memory area is in the active state at any time.
During the above-described process of storing the data, when the data is N pages in length, the erase operation and the programming operation need to be respectively performed 2N times to complete the storage of all the data. Too many erase and write operations and too long-time erase and write operations can shorten the service life of the EEPROM, and reduce the speed of writing data into the memory. The disclosed device structures and methods are directed to solve one or more problems set forth above and other problems.